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1 library IEEE;  2 use IEEE.STD_LOGIC_1164.ALL;  3 use IEEE.STD_LOGIC_ARITH.ALL;  4 use IEEE.STD_LOGIC_UNSIGNED.ALL;  5 entity main is  6     Port ( clk : in  STD_LOGIC;  7            rst : in  STD_LOGIC;  8            led : out  STD_LOGIC_VECTOR (5 downto 0);  9            an : out  STD_LOGIC_VECTOR (3 downto 0); 10            seg : out  STD_LOGIC_VECTOR (6 downto 0)); 11 end main; 12  13 architecture Behavioral of main is 14 signal sclk: std_logic; 15 signal now_state,next_state: std_logic_vector(1 downto 0); 16 signal ledt: std_logic_vector(5 downto 0); 17 signal led_state: std_logic_vector(5 downto 0); 18 signal cnt0:integer:=0; 19 signal cnt1:integer:=0; 20 signal cnt2:integer:=0; 21 signal disp_main:integer:=15; 22 signal disp_branch:integer:=12; 23 signal display:integer; 24 signal time_main:integer; 25 signal time_main_l:integer; 26 signal time_main_h:integer; 27 signal time_branch:integer; 28 signal time_branch_l:integer; 29 signal time_branch_h:integer; 30 signal time_long:integer:=12; 31 constant red_time:integer:=16;  32 constant green_time:integer:=12;  33 constant yellow_time:integer:=3;  34 signal an_sel: integer; 35 begin 36 led(0)<=led_state(0); 37 led(1)<=led_state(1); 38 led(2)<=led_state(2); 39 led(3)<=led_state(3); 40 led(4)<=led_state(4); 41 led(5)<=led_state(5); 42 process(clk) 43 begin 44     if(clk'event and clk='1') then 45         if(cnt0=25000000)then 46             cnt0<=0; 47             sclk<=not sclk; 48         else 49             cnt0<=cnt0+1; 50         end if; 51     end if; 52 end process; 53  54 process(clk) 55 begin 56 if(clk'event and clk='1') then 57     if(cnt2=50000) then 58         cnt2<=0; 59           if(an_sel=3)then 60                 an_sel<=0; 61           else 62                 an_sel<=an_sel+1; 63           end if; 64     else 65         cnt2<=cnt2+1; 66     end if; 67 end if; 68 end process; 69  70 process(now_state) 71 begin 72 case now_state is 73     when "00"=>time_long<=green_time;ledt<="010001";next_state<="01"; 74     when "01"=>time_long<=yellow_time;ledt<="100001";next_state<="11"; 75     when "11"=>time_long<=green_time;ledt<="001010";next_state<="10"; 76     when "10"=>time_long<=yellow_time;ledt<="001100";next_state<="00"; 77     when others=>time_long<=green_time;ledt<="010001";next_state<="00"; 78 end case; 79 end process; 80  81 process(rst,sclk) 82 begin 83     if(rst='1') then 84             now_state<="00"; 85             led_state<="000000"; 86     elsif(sclk'event and sclk='1') then 87             led_state(0)<=ledt(0); 88             led_state(1)<=ledt(1); 89             led_state(2)<=ledt(2); 90             led_state(3)<=ledt(3); 91             led_state(4)<=ledt(4); 92             led_state(5)<=ledt(5); 93             if(cnt1=time_long) then 94                     now_state<=next_state; 95                     cnt1<=0; 96             else 97                     cnt1<=cnt1+1;         98             end if;        99     end if;100 end process;101 102 process(sclk,led_state,rst,cnt1)103 begin104 if (rst='1')then105         disp_main<=red_time;106         disp_branch<=green_time;107     elsif(sclk'event and sclk='1') then108         if(disp_main=0)then109             if(led_state(0)='1')then110                 disp_main<=green_time;111             elsif(led_state(1)='1')then112                 disp_main<=yellow_time;113             elsif(led_state(2)='1')then114                 disp_main<=red_time;115             end if;116         else117             disp_main<=disp_main - 1;118         end if;119         if(disp_branch=0)then120             if(led_state(3)='1')then121                 disp_branch<=green_time;122             elsif(led_state(4)='1')then123                 disp_branch<=yellow_time;124             elsif(led_state(5)='1')then125                 disp_branch<=red_time;126             end if;127         else128             disp_branch<=disp_branch - 1;129         end if;130     end if;131 end process;132 133 process(an_sel,disp_main,disp_branch)134 begin135     time_main<=disp_main;136     if(time_main>=10)then137         time_main_h<=1;138         time_main_l<=time_main-10;139     else140         time_main_h<=0;141         time_main_l<=time_main;142     end if;143         time_branch<=disp_branch;144     if(time_branch>=10)then145         time_branch_h<=1;146         time_branch_l<=time_branch-10;147     else148         time_branch_h<=0;149         time_branch_l<=time_branch;150     end if;151 case an_sel is152         when 0=>an<="1110";display<=time_main_l;153         when 1=>an<="1101";display<=time_main_h;154         when 2=>an<="1011";display<=time_branch_l;155         when 3=>an<="0111";display<=time_branch_h;156         when others=>null;157 end case;158 case display is159           when 0=>seg<=b"0000001";160           when 1=>seg<=b"1001111";161           when 2=>seg<=b"0010010";162           when 3=>seg<=b"0000110";163           when 4=>seg<=b"1001100";164           when 5=>seg<=b"0100100";165           when 6=>seg<=b"0100000";166           when 7=>seg<=b"0001111";167           when 8=>seg<=b"0000000";168           when 9=>seg<=b"0000100";169           when others=>null;170 end case;171 end process;172 end Behavioral;